Dennis的學習筆記

依照F28379D SPEC，由於晶片使用mux管理gpio，所以GPIO PIN 可以設定成I/O、PWM 、SPI..

假設我們要設定EQEP-A：

從GPIO  Muxed Pins 表得知，編碼器的A相、B相、Index相可以分別設定在 GPIO 20, GPIO21，GPIO99或是設定在GPIO50, GPIO 51, GPIO53 ...等, 

從表格中，任選一個可來用來設定EQEP訊號的GPIO來設定。

所以GPIO初使化如下：

void  initEQEP_A(void)
{
    EALLOW;
#if 0

    // 0: enable pull-up 1:disable pull-up
    GpioCtrlRegs.GPBPUD.bit.GPIO50 = 1;     // Disable pull-up on GPIO50 (EQEP1A)
    GpioCtrlRegs.GPBPUD.bit.GPIO51 = 1;     // Disable pull-up on GPIO51 (EQEP1B)
    GpioCtrlRegs.GPBPUD.bit.GPIO53 = 1;     // Disable pull-up on GPIO53 (EQEP1I)
    GpioCtrlRegs.GPBPUD.bit.GPIO52 = 1;     // Disable pull-up on GPIO52 (EQEP1S)

    // 0:Synchronous 1:3-sample qualification 2:6-sample qualification 3:Asynchronous
    GpioCtrlRegs.GPBQSEL2.bit.GPIO50 = 0;   // Sync to SYSCLKOUT GPIO50 (EQEP1A)
    GpioCtrlRegs.GPBQSEL2.bit.GPIO51 = 0;   // Sync to SYSCLKOUT GPIO51 (EQEP1B)
    GpioCtrlRegs.GPBQSEL2.bit.GPIO52 = 0;   // Sync to SYSCLKOUT GPIO52  (EQEP1S)
    GpioCtrlRegs.GPBQSEL2.bit.GPIO53 = 0;   // Sync to SYSCLKOUT GPIO53 (EQEP1I)

    GpioCtrlRegs.GPBMUX2.bit.GPIO50 = 1;    // Configure GPIO50 as EQEP1A
    GpioCtrlRegs.GPBMUX2.bit.GPIO51 = 1;    // Configure GPIO51 as EQEP1B
    GpioCtrlRegs.GPBMUX2.bit.GPIO52 = 1;    // Configure GPIO52 as EQEP1S
    GpioCtrlRegs.GPBMUX2.bit.GPIO53 = 1;    // Configure GPIO53 as EQEP1I

#else

    // Disable internal pull-up for the selected output pins
    // for reduced power consumption
    GpioCtrlRegs.GPAPUD.bit.GPIO20 = 1;    // Disable pull-up on GPIO20 (EQEP1A)
    GpioCtrlRegs.GPAPUD.bit.GPIO21 = 1;    // Disable pull-up on GPIO21 (EQEP1B)
    GpioCtrlRegs.GPAPUD.bit.GPIO22 = 1;    // Disable pull-up on GPIO22 (EQEP1S)
    GpioCtrlRegs.GPDPUD.bit.GPIO99 = 1;    // Disable pull-up on GPIO99 (EQEP1I)

    // Synchronize inputs to SYSCLK
    GpioCtrlRegs.GPAQSEL2.bit.GPIO20 = 0;   // Sync GPIO20 to SYSCLK  (EQEP1A)
    GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 0;   // Sync GPIO21 to SYSCLK  (EQEP1B)
    GpioCtrlRegs.GPAQSEL2.bit.GPIO22 = 0;   // Sync GPIO22 to SYSCLK  (EQEP1S)
    GpioCtrlRegs.GPDQSEL2.bit.GPIO99 = 0;   // Sync GPIO99 to SYSCLK  (EQEP1I)

    // Configure EQEP-1 pins using GPIO regs
    GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 1;    // Configure GPIO20 as EQEP1A
    GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 1;    // Configure GPIO21 as EQEP1B
    GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 1;    // Configure GPIO22 as EQEP1S

    GpioCtrlRegs.GPDGMUX2.bit.GPIO99= 1;    // Configure GPIO99 as EQEP1I
    GpioCtrlRegs.GPDMUX2.bit.GPIO99= 1;    // Configure GPIO99 as EQEP1I

#endif

    EDIS;

}

但LAUNCHXL-F28379D實體電路圖中：

EQEP1A，EQEP1B ，EQEP1I，EQEP2A，EQEP2B，EQEP2I經過一個Logic Level電平轉換 (5V訊號轉換成3.3V訊號)

分別接在GPIO20, GPIO21, GPIO23, GPIO54, GPIO55, GPIO57 中，所以程式中，

A. 若要設定EQEP-A的GPIO pin，只能設定在GPIO20, GPIO21, GPIO99

B. 若要設定EQEP-B的GPIO pin，只能設定在GPIO54, GPIO55, GPIO57